1. Field of the Invention
The invention relates generally to micro-circuitry design. Specifically, this invention relates to an apparatus for reducing the supply noise near large clock drivers.
2. Background Art
In electronic circuits, the system power supply can be shown as an equivalent circuit 10 as shown in FIG. 1. Specifically, the equivalent circuit 10 includes: a system power supply source 12; a system resistance (Rs) 14; a system inductance (Ls) 16; and a system capacitance (Rc) 18. Each of these system components 12, 14, 16, and 18 represent an equivalent value of all of the combined respective components in the power supply system. The performance of the circuit 10 is frequency dependent. As shown in the graph of FIG. 2, as the frequency of the system increases, the resistance of the circuit increases as well. This increase in resistance continues until a peak 20 is reached at a resonance frequency. Finally, the resistance will subside at even higher frequencies.
The rate of increase in the resistance of the circuit as the frequency approaches its resonance value is quantified as a xe2x80x9cQxe2x80x9d value. The xe2x80x9cQxe2x80x9d value is calculated as Q=({square root over ( )}(L/C))/R; where L is the system inductance value; where C is the system capacitance value; and where R is the system resistance value. As shown in FIG. 2, under normal operations, the equivalent circuit 10 has a very high Q value 24 near the resonance frequency. A high current transient with the high Q region of the frequency band causes significant noise in the power supply system. Supply noise can result in such problems as uncertainty of signal arrival time, component or logic malfunction, signal interference, temperature variation, etc.
It would be advantageous to decrease the Q value of the power supply system and thereby reduce supply noise. A reduced Q value 26 is also shown in FIG. 2. This Q value 26 would have the advantage of substantially reducing the supply noise of the respective system. FIG. 3 shows a prior art method of reducing the Q value for a clock driver power supply system. A clock driver 32 is a component that may be included in an integrated circuit or xe2x80x9cchipxe2x80x9d including a large computer microprocessor. The clock driver 32 restores a clock signal by removing any effects of signal dissipation or degradation. The clock driver 32 is just one of many types of components that are commonly included in an integrated circuit. The prior art method used in FIG. 3 involves inserting a de-coupling capacitor 34 across the power supply in parallel with the clock driver 32. However, the capacitor 34 takes up a significant amount of space on the chip. With chip space at a premium, a space efficient method of reducing power supply noise for a clock driver is needed.
In some aspects, the invention relates to a method for reducing power supply noise of a clock driver, comprising: supplying power to a clock driver; and connecting a resistance in parallel with the clock driver.
In another aspect, the invention relates to a method for reducing power supply noise of a clock driver, comprising: step of supplying power to a clock driver; and step of shunting a resistance in parallel with the clock driver.
In another aspect, the invention relates to an apparatus for reducing power supply noise of a clock driver, comprising: a clock driver; a power supply system connected to the clock driver; and a shunting resistor connected across the power supply system in parallel with the clock driver.
In another aspect, the invention relates to an apparatus for reducing power supply noise of a clock driver, comprising: means of supplying power to a clock driver; and means of connecting a resistance in parallel with the clock driver.
Other aspects and advantages of the invention will be apparent from the following description and the appended claims.